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FX 5900 roundup - Under the skin
In the past week a number of popular video card brands have released their NV35 based products into the retail chain. After our review of MSI's FX 5900 solution we wanted to see how some of the other cards from the likes of Asus and Gainward fared against MSI and the other cards that are available on the market. So today we bring you a roundup of three FX 5900s that are currently available here in the United Kingdom and compare them against the best both sides of the VGA war has to offer.

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Most of you will be sick of hearing the primary causes of the NV30's slow and painful death, and whilst it's always a good topic to fill up column inches one can look too deep into the matter. The fact was that very few were available and probably even fewer were bought. Needless to say it was (and will probably remain) a great source of embarrassment for the Green graphics giant.

In our MSI FX 5900 review we took a look at a very important principle in processor design, pipelines. We chose this topic mainly because it has been ushered more than once into our ears at various product launches. Everyone talks pipelines, but sometimes it's quite healthy to know roughly what they are. Today we'll talk about another buzzword we often hear from our jolly PR friends, buses and in particular the memory bus.

ATI have been using a 256bit memory bus for sometime (since the Radeon 9700), NVIDIA has just incorporated this in their latest product, the NV35. It's very well having a 256bit memory bus, but what exactly is a bus in the first place and why is it so important? We'll try and explain.

Buses are present in various parts of your computer, and buses are also extremely important to the efficient operation of a computer. A bus is a shared link (you may want to think of it as a pipe) which typically consists of two sets of wires. One set of wires are called the control line, with the second being labelled the data line. The two buses do totally different things and are vital to the operation of a "bus system".
  • Control lines are generally used to send signal requests, acknowledgements and an indication of what type of data is being transferred on the data lines.
  • Data lines are the wires that actually carry the data from the source to the destination
  • Traditionally there are three types of buses: processor-memory, I/O and backplane. Processor-memory, the one we are interested in; are generally short and there to maximise processor to memory bandwidth. I/O buses can be long and are generally not connected to the processor-memory bus directly. They connect to what is known as a backplane bus. If you think about motherboard architecture you have the PCI bus, which can be considered as an I/O bus that is connected to the "Southbridge" controller. The Southbridge controller acts as the backplane bus for the PCI bus, since it is the Southbridge that connects the PCI bus to the processor-memory bus.

    There are (in general) two types of bus transaction (or activity). A read transaction takes data from memory and to the processor (or an I/O device, should this be an I/O bus), and a write transaction does the opposite, that is to say it writes the data into memory. If we take a quick look at a read transaction we'll catch a glimpse of what goes on. Remember a read transaction will bring data from memory to the device (be it processor or some form of I/O unit).
    For this example the processor is connected to the memory and two secondary data stores (for example, hard disc drives) "hang" off this bus. This structure was present in many older computers, but is generally not in use today. However we use it here to illustrate a simple operation and it's underpinnings still remain valid today.

    1) The output operation initiates a read from the memory. At this stage both control and data lines are in use. The control lines send the read request to the memory whilst data lines contain the location of the data within the memory (known simply as the memory address). No data has been retrieved from the data store.

    2) Now the main memory accesses the secondary data store. In this step neither data nor control line are in use.

    3) The final stage is when the actual output takes place. The data is transferred on the data lines and signals are sent to the secondary store (which is classed as an I/O device) via the control lines. The hard drive generally stores the data as it appears on the bus.
    A write transaction takes less time due to the fact that the hard drive (taking the case of our previous example) does not need to wait for memory to access the data.

    We haven't yet mentioned why we hear memory "speeds". These speeds arrive from having a synchronous bus, the opposite of which is asynchronous. If anything is synchronous then it is timed, or in step with a clock (this applies to anything, not just buses). If a bus is synchronous then we find a clock in the control line. A protocol, or a set of universal commands that are relative to this clock are used for communications. So when you hear "300MHz memory" that means that the clock of the memory bus produces 300 million "ticks" per second.

    As for asynchronous buses which have no internal clock, there are some advantages for opting for this bus. It allows us to have a lengthy bus, without the worry of clock skew (basically the internal clock going wonky) or synchronization (these two caveats are also the bane of distributed systems (eg. the Internet) designers). So if you want to, for example, send some data on a asynchronous bus how do you know when it gets sent? After all it's not following a clock cycle. For that reason a handshaking protocol is used. Although it sounds rather grand and complicated, it's not. It merely is a small number of control signals that basically says these things :
    1) I want to read a bit of memory. This is known as a ReadReq.

    2) The data is now ready to be sent (via the data lines) and is actually present on the data line. Known as DataRdy.

    3) An acknowledgement signal of either the first or second steps. This is sent to say that the control lines have been seen and the data lines have been read. It's a bit like saying "roger" at the end of a radio communication. The term is called Ack.
    These are essentially the tools used in a handshake. The actual handshake itself consists of seven steps. However as with most things, problems still remain, even with handshaking present. One of the biggest problems is something called synchronization failure. This occurs if you want to sample an asynchronous signal (for example, a DataRdy) and can lead to unpredictable behaviour, something you most definitely don't want in a computer. To overcome this problem synchronizers are used.